The present invention relates to semiconductor packages, and more particularly, to a semiconductor package with an embedded heat-dissipating device.
A BGA (Ball Grid Array) semiconductor pace is the mainstream of semiconductor packaging technology due to relatively more I/O connections provided therewith in accordance with densely-packaged electronic components and electronic circuits therein. However, heat generated during the operation of a packaged semiconductor chip increases accordingly with increasing the packaging density of the electronic components and electronic circuits; as a result, if the heat is not efficiently dissipated, functions and the lifetime of the semiconductor package will be detrimentally affected. Moreover, a conventional BGA semiconductor package has the semiconductor chip encapsulated by an encapsulant, which is formed by an encapsulating resin with a low coefficient of thermal conductivity around 0.8 w/mxc2x0K so that the heat-dissipating efficiency of the semiconductor chip with the electronic components and electronic circuits provided on an active surface thereof is sufficiently low Therefore, to efficiently dissipate the heat generated by the semiconductor chip is an urgent problem to solve
Referring to FIG. 1, a FCBGA (Flip Chip Ball Grid Array) semiconductor package 1 is disclosed in the U.S. Pat. No. 5,726,079, which is characterized by disposing a heat sink 10 above a semiconductor chip 11 with an upper surface 100 of the heat sink 10 being exposed out of an encapsulant 12, allowing the heat generated by the chip 11 to be dissipated to e atmosphere through the heat sink 10. However, a drawback has been found as the difficulty in precisely controlling the positioning and height of the heat sink 10 disposed relative tote semiconductor chip 11. During the mold molding process, if the heat sink 10 is positioned too high, it may be compressed by the coupling of molds (not shown), which further may compress the semiconductor chip 11 below the heat sink 10 and cause damage to the chip 11; if the heat sink 10 is positioned too low, a molding resin may easily flash on the upper surface 100 thereof, so that the heat-dissipating area of the semiconductor package 1 is reduced and the heat-dissipating efficiency is degraded. As a result, high preciseness in manufacture is required for positioning the heat sink 10 within the semiconductor package 1, which increases the complexity of the manufacturing process and is cost-ineffective.
Furthermore, referring to FIG. 2, another semiconductor package 2 is proposed in the U.S. Pat. No. 5,977,626. The semiconductor package 2 comprises a heat sink 20 attached to a substrate 21, wherein the substrate 21 has a semiconductor chip 2 mounted thereon. The heat sink 20 has a flat portion 200 and supporting portions 201, wherein the supporting portions 201 are used to support the flat portion 200 to be positioned above the semiconductor chip 22. A cavity 23 formed on the substrate 21 and encompassed by the flat portion 200 and the supporting portions 201 is used to receive the semiconductor chip 22 and gold wires 24 therein. Additionally, the supporting portions 201 are formed with a plurality of protrusions 202 thereon, allowing the heat sink 20 to be strongly fixed to the substrate 21 by means of the protrusions 202.
Although the foregoing semiconductor package 2 improves the heat-dissipating efficiency by the application of the heat sink 20 with a specially-designed structure as shown in FIG. 2, a drawback of the difficulty in precisely positioning the heat sink 20 on the substrate 21 has also been considered. Moreover, a stamping process is required to form the downwardly-bent supporting portions 201 of the heat sink 20, which increases the manufacturing cost and may degrade the planarity of the flat portion 200, allowing the molding resin to flash on an upper surface 2000 of the flat portion 200 (i.e. an exposed surface of the heat sink 20 to the atmosphere) In addition, the heat sink 20 is usually fabricated to be as thin as 0.2 mm or even thinner, and the strength thereof is accordingly reduced, so that the planarity of the flat portion 200 is even more difficult to assure, and the resin flash can not be eliminated.
It is an objective of the present invention to provide a semiconductor package with an embedded heat-dissipating device which helps prevent a semiconductor chip mounted therein from being cracked during the molding process.
It is another objective of the invention to provide a semiconductor package with an embedded heat-dissipating device which assures the positioning and planarity of a heat sink mounted therein.
It is sill another objective of the invention to provide a semiconductor or package with an embedded heat-dissipating device which helps prevent resin from flashing on an exposed side of the heat sink mounted therein so as to increase the heat-dissipating efficiency thereof
It is yet another objective of the invention to provide a semiconductor package with an embedded heat-dissipating device which is more cost-effective to fabricate by using simplified processed.
In accordance with the going and other objectives of the invention, a semiconductor package with an embedded heat-dissipating device is proposed. The semiconductor package of the invention includes a substrate having a first side and a second side, the first side thereof being formed with a set of first solder pads and a set of second solder and the second side of being formed with a plurality of third solder pads; a semiconductor chip having an active side and an inactive side, the active side thereof being mounted with a plurality of solder bumps, which allow to electrically connect the semiconductor chip to the first solder pads of the substrate; a heat-dissipating device including a heat sink and a plurality of connecting bumps, the having sink having a fist side and a second side, the second side thereof being formed with a plurality of connecting pads, which are used to attach the connecting bumps thereto, and the connecting bumps being further attached to the second solder pads of the substrate; a plurality of conductive elements attached to the third solder pads of the substrate, allowing to electrically couple the semiconductor chip with external devices, and an encapsulant encapsulating the semiconductor or chip, the heat-dissipating device and the first side of the substrate, with the first side of the heat sink being exposed to the atmosphere.
The heat-dissipating device is implemented by attaching the connecting bumps to the connecting pads of the heat sink wherein the connecting pads are formed as recesses on the second side of the heat sink, or as holes penetrating from the firs side to the second side thereof, and the connecting bumps are made of a soft metal selected from a group consisting of tin, lead and tin/lead alloy During molding the heat-dissipating device and the solder bumps mounted on the semiconductor chip are reflowed over the substrate in a manner that the distance between the heat sink and the substrate is slightly larger than that between an upper mold and the substrate. When the upper mold and a lower mold are coupled, the clamping force generated thereby is collapsed by the effect of the soft connecting bumps, so as to reduce the pressure applied to the semiconductor chip and assure the planarity of the heat sink by abutting the heat sink the semiconductor chip.
Furthermore, besides that the connecting pads help buffer and release the pressure generated during the collapsing effect of the connecting bumps, the heat sink can be precisely positioned with respect to the substrate by reflowing the connecting bumps over the substrate; during molding, the first side of the heat can closely abut against the upper mold so as to help prevent resin from flashing on the first side of the heat sink.